johnnyrocket Posted December 6, 2011 Share Posted December 6, 2011 5 R-type instructions are to be executed on a 5-stage (scalar) pipelined processor. There are no dependencies among the instructions. If this same instruction sequence is executed instead on a degree-2 super-pipelined version of our processor, what speedup factor would be provided if no other changes are made? A degree-2 super-pipelined system splits each stage into two phases so that the time required for the two phases is the same as the original clock cycle time. Quote Link to comment Share on other sites More sharing options...
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